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Please use this identifier to cite or link to this item: https://hdl.handle.net/10923/18673
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dc.contributor.authorJURACY, LEONARDO REZENDE-
dc.contributor.authorMOREIRA, MATHEUS TREVISAN-
dc.contributor.authorDE AMORY MORAIS, ALEXANDRE-
dc.contributor.authorHAMPEL, ALEXANDRE F.-
dc.contributor.authorFernando Gehm Moraes-
dc.date.accessioned2021-10-01T19:21:49Z-
dc.date.available2021-10-01T19:21:49Z-
dc.date.issued2021-
dc.identifier.issn1549-8328-
dc.identifier.urihttps://hdl.handle.net/10923/18673-
dc.language.isoen-
dc.relation.ispartofIEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS-
dc.rightsopenAccess-
dc.subjectConvolutional Neural Networks-
dc.subjectPPA - power performance area analysis-
dc.subjectDesign space exploration-
dc.titleA High-Level Modeling Framework for Estimating Hardware Metrics of CNN Accelerators-
dc.typeArticle-
dc.date.updated2021-10-01T19:21:48Z-
dc.identifier.doiDOI:10.1109/TCSI.2021.3104644-
dc.jtitleIEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS-
dc.volume99-
dc.spage1-
dc.epage13-
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