Campo DC | Valor | Idioma |
dc.contributor.author | Guilherme Heck | - |
dc.contributor.author | Leandro Sehnem Heck | - |
dc.contributor.author | Ajay Singhvi | - |
dc.contributor.author | Matheus Trevisan Moreira | - |
dc.contributor.author | Ney Laert Vilar Calazans | - |
dc.contributor.author | Peter Anthony Beerel | - |
dc.date.accessioned | 2019-02-11T13:45:22Z | - |
dc.date.available | 2019-02-11T13:45:22Z | - |
dc.date.issued | 2015 | - |
dc.identifier.uri | http://hdl.handle.net/10923/13951 | - |
dc.language.iso | en | - |
dc.relation.ispartof | Proceedings of the 28th VLSID 2015, 2015, Índia. | - |
dc.rights | openAccess | - |
dc.subject | Asynchronous Circuits | - |
dc.subject | Voltage Scaling | - |
dc.subject | Delay Element | - |
dc.subject | Two-Phase Bundled-Data | - |
dc.title | Analysis and Optimization of Programmable Delay Elements for 2-Phase Bundled-Data Circuits | - |
dc.type | conferenceObject | - |
dc.date.updated | 2019-02-11T13:45:21Z | - |
Aparece nas Coleções: | Apresentação em Evento
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