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Browsing by Author Ney Laert Vilar Calazans

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Showing rec. 69 to 78 of 78   ◄ previous   
Issue DateTitleAuthor(s)
2015SDDS-NCL Design: Analysis of Supply Voltage ScalingRicardo Aquino Guazzelli; Fernando Gehm Moraes; Ney Laert Vilar Calazans, et al
2014Semi-custom NCL Design with Commercial EDA Frameworks: Is it Possible?Matheus Trevisan Moreira; Augusto Neutzling Silva; Mayler Gama Alvarenga Martins, et al
2017Sleep Convention Logic Isochronic Fork: an AnalysisRicardo Aquino Guazzelli; Walter Lau Neto; Matheus Trevisan Moreira, et al
2015TDTB Error Detecting Latches: Timing Violation Sensitivity Analysis and OptimizationMatheus Trevisan Moreira; Dylan Hand; Peter Anthony Beerel, et al
2002Teaching computer organization and architecture with hands-on experienceNey Laert Vilar Calazans; MORAES, F.G.; César Augusto Missio Marcon
2020Towards an Integrated Software Development Environment for Robotic Applications in MPSoCs with Support for Energy EstimationsVANCIN, PAULO H.; DOMINGUES, ANDERSON R. P.; PARAVISI, MARCELO, et al
2015Tradeoffs Between RTO and RTZ in WCHB QDI Asynchronous DesignMatheus Trevisan Moreira; Julian José Hilgemberg Pontes; Ney Laert Vilar Calazans
2013TSV Multiplexing: A 3D NoC Occupancy AnalysisYan Ghidini de Souza; Matheus Moreira; Thais Christina Webber Dos Santos, et al
2001Um Ambiente de Compilação e Simulação para Processadores Embarcados ParametrizáveisFernando Gehm Moraes; Ney Laert Vilar Calazans; César Augusto Missio Marcon, et al
2013Voltage Scaling on C-Elements: A Speed, Power and Energy Efficiency AnalysisMatheus Trevisan Moreira; Ney Laert Vilar Calazans
Showing rec. 69 to 78 of 78   ◄ previous