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Please use this identifier to cite or link to this item: https://hdl.handle.net/10923/13955
Type: conferenceObject
Title: Analysis and Design of Delay Lines for Dynamic Voltage Scaling Applications
Author(s): Ramy Nagy Tadros
Weizhe Hua
Matheus Gibiluka
Matheus Trevisan Moreira
Ney Laert Vilar Calazans
Peter Anthony Beerel
In: Proceedings of the 22nd ASYNC 2016, 2016, Brasil.
Issue Date: 2016
Keywords: Delay Lines
Dynamic Voltage Scaling
URI: http://hdl.handle.net/10923/13955
Appears in Collections:Apresentação em Evento

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