A New CMOS Topology for Low-Voltage Null Convention Logic Gates Design

Please use this identifier to cite or link to this item: https://hdl.handle.net/10923/13962

Type:	conferenceObject
Title:	A New CMOS Topology for Low-Voltage Null Convention Logic Gates Design
Author(s):	Matheus Trevisan Moreira Michel Evandro Arendt Ricardo Aquino Guazzelli Ney Laert Vilar Calazans
In:	Proceedings of the 20th ASYNC 2014, 2014, Alemanha.
Issue Date:	2014
Keywords:	Low Power Null Convention Logic Static Topology
URI:	http://hdl.handle.net/10923/13962
Appears in Collections:	Apresentação em Evento

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