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Please use this identifier to cite or link to this item: https://hdl.handle.net/10923/18657
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dc.contributor.authorJURACY, LEONARDO R.-
dc.contributor.authorMOREIRA, MATHEUS T.-
dc.contributor.authorAMORY, ALEXANDRE M.-
dc.contributor.authorFernando Gehm Moraes-
dc.date.accessioned2021-10-01T18:30:05Z-
dc.date.available2021-10-01T18:30:05Z-
dc.date.issued2021-
dc.identifier.isbn9781728176703-
dc.identifier.urihttps://hdl.handle.net/10923/18657-
dc.language.isoen-
dc.relation.ispartof2021 IEEE 12th Latin America Symposium on Circuits and System (LASCAS), 2021, Peru.-
dc.rightsopenAccess-
dc.subjectCNN-
dc.subjectConvolution Hardware Accelerator-
dc.titleA TensorFlow and System Simulator Integration Approach to Estimate Hardware Metrics of Convolution Accelerators-
dc.typeconferenceObject-
dc.date.updated2021-10-01T18:30:04Z-
dc.identifier.doiDOI:10.1109/LASCAS51355.2021.9459183-
Appears in Collections:Apresentação em Evento

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