| Campo DC | Valor | Idioma |
|---|
| dc.contributor.author | Guilherme Korol | - |
| dc.contributor.author | Fernando Gehm Moraes | - |
| dc.date.accessioned | 2021-10-01T18:58:21Z | - |
| dc.date.available | 2021-10-01T18:58:21Z | - |
| dc.date.issued | 2019 | - |
| dc.identifier.isbn | 9781450368445 | - |
| dc.identifier.uri | https://hdl.handle.net/10923/18659 | - |
| dc.language.iso | en | - |
| dc.relation.ispartof | Proceedings of the 32nd Symposium on Integrated Circuits and Systems Design - SBCCI '19, 2019, Brasil. | - |
| dc.rights | openAccess | - |
| dc.subject | FPGA | - |
| dc.subject | Convolutional Neural Networks | - |
| dc.subject | Hardware Accelerators | - |
| dc.title | A FPGA parameterizable multi-layer architecture for CNNs | - |
| dc.type | conferenceObject | - |
| dc.date.updated | 2021-10-01T18:58:20Z | - |
| dc.identifier.doi | DOI:10.1145/3338852.3339840 | - |
| Aparece en las colecciones: | Apresentação em Evento
|
