Campo DC | Valor | Idioma |
dc.contributor.author | Fabiano Passuelo Hessel | - |
dc.contributor.author | César Augusto Missio Marcon | - |
dc.contributor.author | SANTOS, TATIANA | - |
dc.date.accessioned | 2022-11-18T14:06:53Z | - |
dc.date.available | 2022-11-18T14:06:53Z | - |
dc.date.issued | 2007 | - |
dc.identifier.isbn | 0769528961 | - |
dc.identifier.uri | https://hdl.handle.net/10923/23428 | - |
dc.language.iso | pt_BR | - |
dc.relation.ispartof | <![CDATA[IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07)]]>, Brasil. | - |
dc.rights | openAccess | - |
dc.title | High Level RTOS Scheduler Modeling for a Fast Design Validation | - |
dc.type | conferenceObject | - |
dc.date.updated | 2022-11-18T14:06:51Z | - |
dc.identifier.doi | DOI:10.1109/ISVLSI.2007.49 | - |
Aparece nas Coleções: | Apresentação em Evento
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