Please use this identifier to cite or link to this item: http://hdl.handle.net/10923/13948
Type: conferenceObject
Title: Design and Analysis of the HF-RISC Processor Targeting Voltage Scaling Applications
Author(s): Felipe Bortolon
Matheus Gibiluka
Sérgio Johann Filho
Sergio Bampi
Ney Laert Vilar Calazans
Fabiano Passuelo Hessel
Matheus Trevisan Moreira
In: Proceedings of the 29th SBCCI 2016, 2016, Brasil.
Issue Date: 2016
Keywords: Embedded Processors
Voltage Scaling
Digital Circuit Design
RISC
URI: http://hdl.handle.net/10923/13948
Appears in Collections:Apresentação em Evento

Files in This Item:
File Description SizeFormat 
Design_and_Analysis_of_the_HF_RISC_Processor_Targeting_Voltage_Scaling_Applications.pdf794,34 kBAdobe PDFOpen
View


All Items in PUCRS Repository are protected by copyright, with all rights reserved, and are licensed under a Creative Commons Attribution-NonCommercial 4.0 International License. Read more.